ROACH-2 is a stand-alone FPGA board and is the successor to the original ROACH board. ROACH stands for Reconfigurable Open Architecture Computing Hardware.
ROACH-2 was designed as the sequel to ROACH 1 using the new Xilinx Virtex-6 series of FPGAs. It maintains all the aspects that made ROACH 1 a success, but increase the overall performance in terms of processing power, IO throughput and memory bandwidth. It uses the same PowerPC 440EPx present on the ROACH 1 but adds a unified JTAG interface provided through an FTDI FT4232H IC.
The ROACH-2 design includes the following notable features:
The current block diagram is shown below...
The first prototypes have been assembled and are being brought up. Both the PowerPC and the FTDI debug subsystem have been brought up and the FPGA is successfully being programmed via JTAG.
The svn repository for ROACH2 is hosted on a KAT server at the moment. Certain files will be loaded over onto http://casper.berkeley.edu/svn/roach2. If you wish to access the kat svnROACH2 repository you can contact Philip Gibbs or Francois Kapp.
You can find final revision 0 (the first prototype) schematics at: http://casper.berkeley.edu/svn/roach2/elec/roach2/release/rev0/A/PDF_SCHEMATICS/roach2_sch.pdf
You can find possibly/probably? final Roach2 rev1 schematics at; https://casper.berkeley.edu/wiki/images/a/a5/Roach2_rev1_schematics.pdf
You can find all the design files for the first prototype, including gerbers, at: http://casper.berkeley.edu/svn/roach2/elec/roach2/release/rev0/A/
The roach2.PcbDoc and various schematics files like qdr0_1.SchDoc may be viewed on Windows computers using Altium's free viewer found at http://www.altium.com/community/downloads/en/downloads_home.cfm specifically the 131 MB file at http://downloads.altium.com/altiumdesigner/AltiumDesignerViewerBuild22.214.171.12453.zip No registration is required and install is simple.
ROACH-2 was primarily specified for the packetised correlator, which was considered to be the most demanding application. A number of configurations were considered, including PAPER, ATA and MeerKAT's upcoming requirements. The calculations for memory sizing, datarates and bus widths can be found here.
ROACH-2 introduces slots for two multi-gigabit transceiver mezzanine cards. This add flexibility to choose whichever 10Ge physical layer is most convenient. It also provides an opportunity to research high-speed ADCs.
A CX4 version of this card has been designed and tested. The card supports three CX4 ports, a fourth set of XAUI signals is taken to two headers. There are an additional 6 x 1.5V CMOS IOs taken to a gpio connector. The CX4 port support active cables. More information is here: CX4 (3 x CX4 Mezzanine board)
A quad SFP+ version is in progress. See SFP+ (Quad SFP+ Mezzanine board).
The slide show for the design review can be found at: http://casper.berkeley.edu/svn/roach2/doc/review/ROACH%20II%20Review.pdf
Prototype run of two boards completed with Tellumat Jan 2011.
Pre-production run of 5-10 boards planned with Tellumat May-June 2011.
Full production still TBD.
Currently the MMSGE toolflow will only support 11.4-5 ISE/EDK tools. The board support package supports any ISE version beyond 11.4. In the long term we need to get the MSSGE tools working with newer tools.
A preliminary datasheet can be found here: http://casper.berkeley.edu/svn/roach2/doc/pcb_review/doc/DataSheet/ROACHII%20Datasheet%20Rev1A%20Draft.pdf
We have now tested enough that we are happy to start working on the next rev. Only the dram remains untested.
The following works:
Will not test:
the chip function with a couple of easy board changes. Existing boards have been/will be reworked and the production version of the board will incorporate the revisions.
Derived from Philip Gibbs' email of 2011sep12
Below are a collection of pictures of board 010101 which is one of the first pre-production boards produced at DigiCom.
Here are a couple of pictures highlighting the rework required to compensate for the errors in the datasheet Maxim published for the MAX16071 current and voltage monitoring IC.